Orchid XP v8 <voi### [at] devnull> wrote:
> I still kinda wish you could actually build a PC that had several GB of 
> RAM running at the same speed as the CPU - but I'm guessing it might be, 
> uh, slightly expensive?

  I'm not even sure it would be physically possible. L1 caches are always
quite small, and I'm not sure it's all about money.

-- 
                                                          - Warp

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"Orchid XP v8" <voi### [at] devnull> wrote in message
news:480cf308$1@news.povray.org...

> > Very slightly...
> > To give you an idea, I've jsut bought components for a new PC. CPU is a
quad
> > core running at 2.4 GHz.
> > I can get 4 GB of 800 MHz DDR2 memory for around R250. I can get 2 GB of
> > 1066 MHz memory (same speed as the FSB) for around R800
>
> Except that - as the guy pointed out - it's *not* the same speed as the
> CPU. It's actually 566 MHz, double-pumped. And the RAM itself is running
> at a lowly 266 MHz. No wonder it takes > 200 cycles to access main
> memory... :-S

I never said it was. CPU's running at 2.4 GHz. FSB is much slower, memory
slower still.

But look at the price difference anyway. Not insignificant

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Orchid XP v8 wrote:
> Even more fun is trying to provide "atomic" access operations - which, 
> as far as I can tell, absolutely *must* be done at the hardware level. 
> There's just no way you could implement it in software.

Actually, there is. Look up Lamport's "baker's algorithm."  Weird stuff.

It kind of surprised me it was possible too.

-- 
   Darren New / San Diego, CA, USA (PST)
     "That's pretty. Where's that?"
          "It's the Age of Channelwood."
     "We should go there on vacation some time."

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Warp wrote:
> Orchid XP v8 <voi### [at] devnull> wrote:
>> I still kinda wish you could actually build a PC that had several GB of 
>> RAM running at the same speed as the CPU - but I'm guessing it might be, 
>> uh, slightly expensive?
> 
>   I'm not even sure it would be physically possible. L1 caches are always
> quite small, and I'm not sure it's all about money.

Yeah, speed-of-light delays can kill you, and a huge amount of the delay 
comes from address decoding rippling thru the cascade. Or at least used to.

That's why the old Cray supercomputers were cylindrical - it put the 
edges of the CPU cards that much closer together so they could talk faster.

-- 
   Darren New / San Diego, CA, USA (PST)
     "That's pretty. Where's that?"
          "It's the Age of Channelwood."
     "We should go there on vacation some time."

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Darren New <dne### [at] sanrrcom> wrote:
> >   I'm not even sure it would be physically possible. L1 caches are always
> > quite small, and I'm not sure it's all about money.

> Yeah, speed-of-light delays can kill you, and a huge amount of the delay 
> comes from address decoding rippling thru the cascade. Or at least used to.

  The speeds involved are much lower than c.

  If I'm not mistaken, the electric current phenomenon traverses in copper
at about 0.7c. I have no idea how fast it traverses in silicon, but
I wouldn't be surprised if it was even slower than that (given that
silicon is not a metallic conductor).

  The major factor is, however, the transistor phase change delays.

-- 
                                                          - Warp

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Darren New <dne### [at] sanrrcom> wrote:
> Actually, there is. Look up Lamport's "baker's algorithm."  Weird stuff.

  Mutual exclusion in software is always a bottleneck, especially if
it needs to be executed a lot. This is the reason why, for example,
developing lock-free data containers has been so fervously studied
in the gaming industry. (There's about 16 milliseconds between frames
to calculate everything that needs to be calculated to create the
next frame, eg. physics and AI, and basically none of this time can
be spent in mutual exclusion locks. Software locks can cause a very
considerable overhead in such situations and are basically out of
question.)

-- 
                                                          - Warp

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Warp wrote:
> Darren New <dne### [at] sanrrcom> wrote:
>>>   I'm not even sure it would be physically possible. L1 caches are always
>>> quite small, and I'm not sure it's all about money.
> 
>> Yeah, speed-of-light delays can kill you, and a huge amount of the delay 
>> comes from address decoding rippling thru the cascade. Or at least used to.
> 
>   The speeds involved are much lower than c.

Yep. Even in fiber optics, it's noticably slower. But even if you *did* 
do speed-of-light transfer, having a huge amount of memory that takes up 
a cubic foot of space means you're still not going to get transfers in 
nano-second timeframes.

>   If I'm not mistaken, the electric current phenomenon traverses in copper
> at about 0.7c. 

That's my memory too.

>   The major factor is, however, the transistor phase change delays.

And waiting for all the transistors to settle. I.e., waiting for the 
clock to propagate. Some of teh really cutting-edge high speeds are done 
with clockless architectures. Of course, they're rather limited in what 
they can do, very special-purpose.

-- 
   Darren New / San Diego, CA, USA (PST)
     "That's pretty. Where's that?"
          "It's the Age of Channelwood."
     "We should go there on vacation some time."

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Warp <war### [at] tagpovrayorg> wrote:
> Orchid XP v8 <voi### [at] devnull> wrote:
> > I still kinda wish you could actually build a PC that had several GB of
> > RAM running at the same speed as the CPU - but I'm guessing it might be,
> > uh, slightly expensive?
>
>   I'm not even sure it would be physically possible. L1 caches are always
> quite small, and I'm not sure it's all about money.
>
> --
>                                                           - Warp

Not all about money?!? Earth to Warp, Come in Warp.

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Warp wrote:
> Orchid XP v8 <voi### [at] devnull> wrote:
>> I still kinda wish you could actually build a PC that had several GB of 
>> RAM running at the same speed as the CPU - but I'm guessing it might be, 
>> uh, slightly expensive?
> 
>   I'm not even sure it would be physically possible. L1 caches are always
> quite small, and I'm not sure it's all about money.

Yeah, that too.

I suspect propogation delay, ripple time and heat dissapation would all 
constitude pretty significant "issues".

-- 
http://blog.orphi.me.uk/
http://www.zazzle.com/MathematicalOrchid*

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alphaQuad <alp### [at] earthlinknet> wrote:
> >   I'm not even sure it would be physically possible. L1 caches are always
> > quite small, and I'm not sure it's all about money.

> Not all about money?!? Earth to Warp, Come in Warp.

  There are things which are just physically impossible, no matter how
much money you throw at them.

-- 
                                                          - Warp

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