"Warp" <war### [at] tagpovrayorg> schrieb im Newsbeitrag news:3ca5bf52@news.povray.org...
> Jan Walzer <jan### [at] lzernet> wrote:
> > I'm wondering, what kind of instruction word this ASM-interpreter uses ...
>
> > are they more CISC- or more RISC- like ? ...
>
>   That depends on how you define CISC and RISC.
>   I don't think there are really many instructions, so one could say that
> it's a "reduced instruction set". However, one typical feature of CISC is
> that each instruction takes the same amount of memory and 1 clock cycle to
> execute, which I don't think is the case.

That is RISC ... the reduced instructionset normally has every opcode same
length (4Bytes on a 32Bit-architecture (look_at MIPS))... This is the criteria
I wanted to ask. OTOH CISC has different length opcodes, that are interpreted by
an microcode, where normally different runtimes for different ops can be seen ...
... of course, the time, needed for execution of an operation is not necessary the
same for all instructions of a RISC machine, too ...

I see now, that my question was not exactly formulated ...
I better should have asked: will the ASM-code more base on Load-Store-arch (which
is "quite" common for RISC) or will it be more like Work-Direct-In-Mem-arch (which
is more common for CISC) ...

> > > BTW: What 'bout self-modifying code ? ... that would be nice ... back to
> > > oldschool
> >   I doubt that you have any possibility of writing to memory.
[CJH]> Depends on what you mean by self modifying...POV-Script could probably
[CJH]> output a function ASM file and then load it as a function.

No ... this is not what I meant ... I mean, that the prog, can modify itself
in memory, to speedup execution ...
... or to make unreadable code ...

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