POV-Ray : Newsgroups : povray.advanced-users : Array irritation. : Re: Array irritation. Server Time
30 Jul 2024 04:21:34 EDT (-0400)
  Re: Array irritation.  
From: Thorsten Froehlich
Date: 19 Oct 2000 01:41:23
Message: <39ee8983$1@news.povray.org>
In article <39EE5D5E.CCAB2069@hotmail.com> , Pabs <pab### [at] hotmailcom>  
wrote:

> Ever seen the sh*t f**cking code msvc produces with no optimisations for
> things like the following?
> ++i;

Maybe it is optimising, but in a different way than you expect. On the one
hand "i" might be needed somewhere else and inc i could only work on
register variables (sorry, I don't know x86 assembler too well).  This doing
either would give the same performance.  Especially if "i" is stored in a
rather complicated place or only used once, or a global variable, or a
million other things.

Or it might well be that the sequence it generates executes faster on modern
processors that translate your code to internal RISC-like instructions (like
P6 and later do).  Why come to this conclusion?

Well, what you see is a load/store (i.e. most RISC processors) way of
handling the problem.  Basically a load/store architecture based processor
will not have complex operations that work on memory and data at the same
time.  Everything first has to be loaded into a register, then it will be
processed and then placed back in memory.  This is usually more efficient
because these processors have much larger register files, 32 or even 64
registers compared to the 8 registers a x86 has.


    Thorsten


____________________________________________________
Thorsten Froehlich, Duisburg, Germany
e-mail: tho### [at] trfde

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