 |
|
|
|
|
|
| |
| |
|
|
|
|
| |
| |
|
|
Am 04.11.2012 11:50, schrieb Warp:
> Le_Forgeron <jgr### [at] free fr> wrote:
>> http://www.mindshare.com/shop/?c=b§ion=0A6B17101710
>
>> Have a peek inside, page 117 (#363) should answer it. More on the next
>> pages too.
>
>> And next jump to 147-149 (#629-#631)
>
> How about just explaining it in a few sentences?
Say, I might be messing things up here (sorry if I do), but don't you
happen to be one of the people who love to respond with "GIYF"?
Post a reply to this message
|
|
| |
| |
|
|
|
|
| |
| |
|
|
clipka <ano### [at] anonymousorg> wrote:
> Say, I might be messing things up here (sorry if I do), but don't you
> happen to be one of the people who love to respond with "GIYF"?
What makes you think I haven't tried?
--
- Warp
Post a reply to this message
|
|
| |
| |
|
|
|
|
| |
| |
|
|
clipka <ano### [at] anonymousorg> wrote:
> The APs enter Halt state, so to wake them up you trigger whatever event
> gets a CPU out of Halt... Interrupt, maybe? You COULD possibly read up
> on it in the System Programmer's Guide; see the link I posted.
So far what I have gathered is this:
The correct answer depends on the processor architecture, of course, but
for example in most Intel-based architectures there's a physical controller
chip named APIC (Advanced Programmable Interrupt Controller) that's used
for, among other things, wake up additional processors/cores and make them
run specified code.
What I still can't figure out is how exactly you tell the APIC to do that.
--
- Warp
Post a reply to this message
|
|
| |
| |
|
|
|
|
| |
| |
|
|
Le 06/11/2012 14:33, Warp a écrit :
> clipka <ano### [at] anonymousorg> wrote:
>> The APs enter Halt state, so to wake them up you trigger whatever event
>> gets a CPU out of Halt... Interrupt, maybe? You COULD possibly read up
>> on it in the System Programmer's Guide; see the link I posted.
>
> So far what I have gathered is this:
>
> The correct answer depends on the processor architecture, of course, but
> for example in most Intel-based architectures there's a physical controller
> chip named APIC (Advanced Programmable Interrupt Controller) that's used
> for, among other things, wake up additional processors/cores and make them
> run specified code.
>
> What I still can't figure out is how exactly you tell the APIC to do that.
>
Probably like with any other controller: read & write operation to its
'magical' locations (so, load & store in assembly...)
From page 7, it seems the APIC registers are in a 4K-byte page....
>
http://www.intel.com/content/dam/doc/specification-update/64-architecture-x2apic-specification.pdf
Post a reply to this message
|
|
| |
| |
|
|
|
|
| |
| |
|
|
Am 06.11.2012 14:29, schrieb Warp:
> clipka <ano### [at] anonymousorg> wrote:
>> Say, I might be messing things up here (sorry if I do), but don't you
>> happen to be one of the people who love to respond with "GIYF"?
>
> What makes you think I haven't tried?
I do believe you did try to google it up, but you don't seem to have
bothered reading the few pages of documentation Jerome pointed you to.
Post a reply to this message
|
|
| |
| |
|
|
|
|
| |
