> There is a fallacy here: In contrast to a bipolar transistor, where the
> voltage drop is more or less constant, in a FET it is the resistance
> that is more or less constant (and low but non-zero), while the voltage
> drop may actually vary wildly, depending on the current flowing;

I thought the resistance (between source and drain) changes 
significantly as you change the gate voltage though? Otherwise how does 
a FET amplifier work? Like this one:

http://newton.ex.ac.uk/teaching/CDHW/Electronics2/PHY2028-C16.1.gif

That's the bit I'm missing/not understanding. If the effective 
resistance (Vds/Id) is always a constant, near zero (much less than 10K 
I assume), then wouldn't that mean the outputs in that circuit (Vd and 
Vs) were always 7.5V or thereabouts?

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