Am 13.05.2016 um 11:20 schrieb scott:
>>> As clipka mentioned, a transistor used in digital circuits is either in
>>> a state where the current flow is zero ("off") OR the voltage drop is
>>> zero ("on"), so heat output is usually zero. It's switching between
>>> those two states, when both voltage and current are non-zero, that
>>> significant heat is dissipated within the transistor.
>>
>> Um... no?
> 
> It was a while ago I did my electronics course, but I was under the
> impression a FET worked a bit like a voltage controlled resistor. So
> with zero volts on the gate the resistance between drain and source was
> effectively infinite (so no current would flow), and as you increase the
> gate voltage the resistance went down to almost zero at a high enough
> gate voltage (so there would be current flowing, determined by whatever
> the output was connected to, but the voltage drop across the transistor
> would be near-zero).
> 
> For digital circuits you switch between fully on and fully off, whereas
> in an analog design (eg audio amplifier) you work in the "inbetween"
> region, controlling the output current based on the gate voltage. In
> this inbetween region, you have a non-zero voltage drop, and a non-zero
> current flow, so this generates heat inside the device according to P=VI.
> 
> Feel free to correct me where my understanding :-)

There is a fallacy here: In contrast to a bipolar transistor, where the
voltage drop is more or less constant, in a FET it is the resistance
that is more or less constant (and low but non-zero), while the voltage
drop may actually vary wildly, depending on the current flowing; if
there is /any/ external mechanism that serves to stabilize the voltage
across the FET's source-drain channel, it /will/ remain high, and
according to R=V/I will instead drag the current up with it.

Note that R=V/I can be rewritten as I=V/R, so that P=VI = V^2/R --
meaning that, given a sufficiently stabilized voltage, a constant
near-zero resistance will actually lead to a *near-infinite* power
consumption (and consequently heat generation).

You can easily check this by connecting the terminals of a sufficiently
strong power source, such as a car battery, with a sufficiently constant
low-ohmic resistor, such as a piece of thick copper wire. (Spoiler
alert: *Don't!*)

And voltage-stabilizing elements are abundant in any modern digital
circuitry -- you want the power rails' voltage to be as stabile as
possible, after all; also, all the transistor gates to be switched
inevitably act as capacitances themselves, and you have parasitic
capacitances between the "wires"; at the same time you want to minimize
any current-stabilizing effects, such as parasitic inductivity, as they
stand in the way of increasing operating speed.


So again, no -- the fact that in modern digital circuitry switched-on
FETs don't draw any power is not because of any inherent near-zero
voltage drop in the on-state (as demonstrated above such an effect does
not exist), but because due to the design of the circuitry the current
is, for all purposes and intents, actually zero (which happens to have
the side effect that the voltage drop is indeed also zero) when the
circuitry is in a steady state. (As a matter of fact, switched-on FETs
/do/ consume power whenever they participate in the charging or
discharging of another FET's gate.)

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