POV-Ray : Newsgroups : povray.off-topic : My hypothesis : Re: My hypothesis Server Time
26 Sep 2024 17:45:13 EDT (-0400)
  Re: My hypothesis  
From: Orchid XP v8
Date: 14 Sep 2011 16:55:28
Message: <4e7114c0$1@news.povray.org>
On 14/09/2011 05:48 PM, Darren New wrote:
> On 9/14/2011 1:56, Invisible wrote:
>> It's not about task switches, it's about two tasks running on different
>> cores trying to communicate through memory. If the cores didn't
>> automatically synchronise their caches, that wouldn't work at all.
>
> You're missing my point. If it doesn't work with two cores, it doesn't
> work with one core either.

Yes it does. Because if two tasks run on the same core, they share the 
same cache. It's not possible to have two caches out of sync unless 
there's actually, you know, *two caches*.

> If it's automatic, why do x86 CPUs have memory fence instructions?

I'm guessing that's for performance, not correctness.

-- 
http://blog.orphi.me.uk/
http://www.zazzle.com/MathematicalOrchid*


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