>> If the hardware didn't enforce cache coherence, applications would work
>> perfectly on a uniprocessor and then break spectacularly on a
>> multiprocessor.
>
> In what way would it break, given the OS inserts a memory barrier when
> it switches tasks?

It's not about task switches, it's about two tasks running on different 
cores trying to communicate through memory. If the cores didn't 
automatically synchronise their caches, that wouldn't work at all.

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