On 9/13/2011 1:31, Invisible wrote:
> If you cache something in a register that you shouldn't have, your
> application will break on a uniprocessor system. And you'll notice this, and
> fix it.

Right.

> If the hardware didn't enforce cache coherence, applications would work
> perfectly on a uniprocessor and then break spectacularly on a
> multiprocessor.

In what way would it break, given the OS inserts a memory barrier when it 
switches tasks?

I.e., in what case would you expect a variable written to memory followed 
immediately by a nondeterministic task switch to give you different results 
on a multi vs uni processor? In what case would you expect a variable cached 
in a register to give you different results during a task switch on a multi 
vs uni processor?

-- 
Darren New, San Diego CA, USA (PST)
   How come I never get only one kudo?

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