On 6/6/2011 12:40 PM, Orchid XP v8 wrote:
>
> It's quite clear that the design motivation behind this was not chip
> space but OS support. Compared to the space taken up by huge caches, a
> piffling 7 registers is nothing...
>

Actually, this is exactly why the aliased the floating point registers 
in MMX. Otherwise, without the OS supporting the new registers, all hell 
would break loose when the OS handled an ISR, because it was not aware 
of the new registers and didn't properly preserve their values. 
(Remember, interrupts only store the flags and the instruction pointer 
before being serviced. It's the job of the ISR to preserve any other 
registers.)

But how could that be? If the OS isn't aware, then it wouldn't alter 
them, so they'll be fine. Except the OS does things like dispatch to a 
game's input handler when a keypress comes in, and causes the screen to 
redraw, which uses SIMD instructions to repaint the screen. Corrupting 
the very same registers another program was using to perform some sort 
of signal analysis in the background. Oops.

-- 
~Mike

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