>> In what way does having a bizarre machine model help here?
>
> First, it's not bizarre; it's pretty much how many (for example) VMs
> define their machine language. It's called a zero-address machine.
> Second, it's because the op codes don't need to have register numbers in
> them, so they can be smaller and hence faster to transfer. Most
> mathematics involving FP that you are actually willing to pay extra to
> speed up wind up being larger expressions, I'd wager. Plus, the
> intermediate registers were 80 bits.

I suppose if you had a really deep stack, this might make sense. You 
could just keep subexpressions on the stack in their natural order, and 
everything would be fine. Unfortunately, 7 deep is nowhere near enough. 
You end up needing to constantly rearrange the data to avoid spilling 
registers back to main memory. (The only explanation I can come up with 
is that if RAM is faster than CPU, spilling is no biggie.)

>> It's quite clear that the design motivation behind this was not chip
>> space
>> but OS support.
>
> True, in this case. But why would you say "the old OS works with new
> software to take advantage of this feature" is stupid?

Kludging the design in a way which will haunt us forever just to get a 
product to market a few months faster sounds pretty stupid to me.

>> This is precisely why Haskell's unofficial motto is "avoid success at all
>> costs". (I.e., once you are successful, you have to *care* about
>> backwards compatibility.)
>
> That's why I mentioned Haskell. Unfortunately, real-world companies
> building billion-dollar semiconductor fabs don't get to actively avoid
> success.

Fortunately, Haskell gave up avoiding success some time ago...

>> I keep hoping that some day somebody will come up with a chip design that
>> runs crappy old 16-bit MS-DOS stuff under software emulation, but runs
>> real
>> Big Boy software that people might give a damn about on a platform with a
>> modern, coherant design.
>
> They do. Intel chips are RISCs interpreting IA32 instructions. :-)

In other words, they are RISC chips with none of the advantages of RISC.

-- 
http://blog.orphi.me.uk/
http://www.zazzle.com/MathematicalOrchid*

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