On 6/3/2011 7:50, Mike Raiford wrote:
> Don't some RISC processors sort of do this?

Actually, all you need to do is accept that maybe C-like/Algol-like 
languages aren't the best approach to programming these types of machines. 
FORTH, for example, is very happy doing bunches of work on the local stack 
before going explicitly out to external memory, and I've seen designs for 
very high-speed FORTH-based chips with 32 or 64 cores per chip that have 
relatively little memory contention because of it.

Go to a language model that's either primitive enough (like FORTH) yet close 
enough to the chip architecture that you can force the programmer to 
structure the algorithm in a way that's efficient, or something high-level 
enough (like Hermes or Haskell perhaps) that a Sufficiently Smart Compiler 
(TM) can restructure the code appropriately.

> Right.. There would need to be some sort of controller that could transfer
> data from Block A to Block B. Addressing would be quite ... interesting in
> this scheme.

This is a well known problem with lots of good solutions, depending on how 
you implement the interconnections. The problem is that lots of algorithms 
are inherently sequential.

-- 
Darren New, San Diego CA, USA (PST)
   "Coding without comments is like
    driving without turn signals."

Post a reply to this message