On Sat, 15 Aug 2009 09:10:26 +0100, Orchid XP v8 <voi### [at] devnull> wrote:

 
>> Good grief Andrew, 7400s, did you rob a museum?
>
>Maplin.
>

When I worked for Motorola way back in the mid 70's. Maplin and RS were sold the
ICs that failed all the tests except the functional ones. So I would not trust
the quality very much. 

>IIRC, they charge 21.22p per chip. (Presumably the 0.22p only makes a 
>difference if you buy hundreds of them...)
>

I suppose I was spoilt as I always worked for a company that would let me have
them free. FWIW It was considered an educational thing to allow engineers some
time and materials for home jobs.

>> Do you know the power consumption of TTL compared to CMOS?
>
>TTL has the advantage that it doesn't break if you touch it. ;-)
>

Fair point although I never had much problem with ESD and CMOS as long as you
earth yourself. 

>> Besides pin 14 being Vcc and pin 7 ground.
>
>OK. I was going from memory there.
>

I guessed as much.

>> You cannot assume that inputs will
>> float high you really should drive them high or low.
>
>...?

IIRC I think the specs said that TTL inputs would be at a logical 1 if there was
no connection. (Internal resistor to Vcc) 
This was not the case with CMOS, so I was wrong saying that TTL had to be driven
either high or low. But it is good practice to drive your inputs in case there
are things in your physical circuit that might affect what you think will
happen. Such as dry joints, solder bridges, RF pickup etc.
-- 

Regards
     Stephen

Post a reply to this message

>>> Good grief Andrew, 7400s, did you rob a museum?
>> Maplin.
> 
> When I worked for Motorola way back in the mid 70's. Maplin and RS were sold the
> ICs that failed all the tests except the functional ones. So I would not trust
> the quality very much. 

I'm told 10% resistors show a curios bimodel resistance distribution 
too. ;-)

BTW... What tests are there *other* than functional ones?!

> FWIW It was considered an educational thing to allow engineers some
> time and materials for home jobs.

Indeed. I'm told Cadbury let their employees eat as much chocolate as 
they want. Not so much for educational purposes, but because the amount 
of chocolate that one employee can eat without being horrifyingly sick 
is insignificant compared to the amount of chocolate they make per day...

>>> Do you know the power consumption of TTL compared to CMOS?
>> TTL has the advantage that it doesn't break if you touch it. ;-)
> 
> Fair point although I never had much problem with ESD and CMOS as long as you
> earth yourself. 

What voltage does CMOS use anyway? IIRC, TTL can be driven with a 
triplet of 1.5 V batteries.

>> OK. I was going from memory there.
> 
> I guessed as much.

It's been a while since I did all this.

> IIRC I think the specs said that TTL inputs would be at a logical 1 if there was
> no connection. (Internal resistor to Vcc) 

Oh.

Well that would be a problem then. I was assuming it would be logic 0. o_O

> This was not the case with CMOS, so I was wrong saying that TTL had to be driven
> either high or low. But it is good practice to drive your inputs in case there
> are things in your physical circuit that might affect what you think will
> happen. Such as dry joints, solder bridges, RF pickup etc.

So connecting to the negative rail should give me 0, and connecting to 
the positive rail should give 1?

-- 
http://blog.orphi.me.uk/
http://www.zazzle.com/MathematicalOrchid*

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On Sat, 15 Aug 2009 12:37:30 +0100, Orchid XP v8 <voi### [at] devnull> wrote:

>>>> Good grief Andrew, 7400s, did you rob a museum?
>>> Maplin.
>> 
>> When I worked for Motorola way back in the mid 70's. Maplin and RS were sold the
>> ICs that failed all the tests except the functional ones. So I would not trust
>> the quality very much. 
>
>I'm told 10% resistors show a curios bimodel resistance distribution 
>too. ;-)
>

It would not surprise me but I could not say for sure,

>BTW... What tests are there *other* than functional ones?!
>

Well it was quite a while ago and I assume that they will have changed.
IIRC: Rise and fall times of the output, propagation delay of the gates, input
and output voltage range, operational temperature and humidly. There was a
centrifuge test up to 200 g for mil spec and a test where the ICs were dipped in
liquid helium and tested to see if there were any leaks on the encapsulation.


>> FWIW It was considered an educational thing to allow engineers some
>> time and materials for home jobs.
>
>Indeed. I'm told Cadbury let their employees eat as much chocolate as 
>they want. Not so much for educational purposes, but because the amount 
>of chocolate that one employee can eat without being horrifyingly sick 
>is insignificant compared to the amount of chocolate they make per day...
>

I believe that too.

>>>> Do you know the power consumption of TTL compared to CMOS?
>>> TTL has the advantage that it doesn't break if you touch it. ;-)
>> 
>> Fair point although I never had much problem with ESD and CMOS as long as you
>> earth yourself. 
>
>What voltage does CMOS use anyway? IIRC, TTL can be driven with a 
>triplet of 1.5 V batteries.
>

Why don't you look it up as I can't remember,

>>> OK. I was going from memory there.
>> 
>> I guessed as much.
>
>It's been a while since I did all this.
>
>> IIRC I think the specs said that TTL inputs would be at a logical 1 if there was
>> no connection. (Internal resistor to Vcc) 
>
>Oh.
>
>Well that would be a problem then. I was assuming it would be logic 0. o_O
>

:-)

>> This was not the case with CMOS, so I was wrong saying that TTL had to be driven
>> either high or low. But it is good practice to drive your inputs in case there
>> are things in your physical circuit that might affect what you think will
>> happen. Such as dry joints, solder bridges, RF pickup etc.
>
>So connecting to the negative rail should give me 0, and connecting to 
>the positive rail should give 1?

Yes, by George you've got it!

:)
-- 

Regards
     Stephen

Post a reply to this message

On 15-8-2009 13:37, Orchid XP v8 wrote:
>>>> Good grief Andrew, 7400s, did you rob a museum?

> 
>> IIRC I think the specs said that TTL inputs would be at a logical 1 if 
>> there was
>> no connection. (Internal resistor to Vcc) 
> 
> Oh.
> 
> Well that would be a problem then. I was assuming it would be logic 0. o_O

Starting middle of September I'll be teaching digital technology in the 
first year of the University of Applied Science in Amsterdam. If you 
happen to be around, just drop in. I think I will do the 7400 in the 
week of Sept 21. ;)

As others have said, the original TTL series by Texas Instruments acted 
as if a one was present if left open. All other gates should do the same 
because of backwards compatibility. That includes the CMOS pin 
compatible replacements. I have actually seen rare default 0 gates but I 
would consider those faulty.

When designing the rule is not to leave inputs open. Not even for gates 
you don't use. One reason is that they could pick up interference which 
could result in unpredictable behaviour. For CMOS gates it could also 
result in useless power consumption. In any case the inputs are often 
next to one another like in the 7400. It is just as easy to wire them 
together (connecting them to ground (for NOR gates) or the positive rail 
(for NAND gates) is often more complicated).

Oh, and if you want to build your own computer, I'd suggest using also 
other components apart from the 7400.

Post a reply to this message

On Sat, 15 Aug 2009 22:08:45 +0200, andrel <a_l### [at] hotmailcom> wrote:

>Oh, and if you want to build your own computer, I'd suggest using also 
>other components apart from the 7400.

Why? :P

Maybe some JK and D flip-flops
-- 

Regards
     Stephen

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Orchid XP v8 schrieb:
>>> And then I got stumped by the fact that the gates don't appear to do 
>>> what the diagrams suggest they should...
>>
>> In what way?
> 
> The 7400 is a quad 2-input NAND gate. In other words, it's a box with 
> four NAND gates in it.
> 
> What's supposed to happen is that you connect pins 1 and 14 to a power 
> source, and the remaining pins are grouped into 3s. Each group is the 
> connections for a single NAND gate. When the inputs aren't connected, 
> the output pin is at logic high. When you connect both of the input pins 
> to the (+) rail, the output should go low.
> 
> ...except this doesn't seem to happen. I swear to God I built circuits 
> like this when I was a kid, and it worked. But when I tried it as a 
> teenager, it wouldn't work for toffee. No idea why.

Maybe some other technology? While classic TTL gates (74xx) as well as 
Low Power Schottky variants (74LSxx) would internally pull up 
unconnected inputs, CMOS gates (74HCxx and 74HCTxx) would lack a pull-up 
resistor, causing unconnedted inputs to float erratically.

To work properly, all input pins of a CMOS IC /must/ therefore be 
actively pulled to either VCC or GND (a resistor is not required in that 
case, as CMOS ICs draw virtually no current on static input pins, so you 
can directly connect them to VCC or GND). It is even highly recommended 
to even connect all input pins of unused gates in an IC package.

Post a reply to this message

Stephen schrieb:
>> What voltage does CMOS use anyway? IIRC, TTL can be driven with a 
>> triplet of 1.5 V batteries.
> 
> Why don't you look it up as I can't remember,

74HCxx: 2V to 6V (i.e. a doublet or triplet of 1.5 V batteries will do 
fine, even when quite depleted already)

74HCTxx: 5V, +/- 0.5V (i.e. a triplet will probably do quite well if 
still good)

Power consumption is virtually zero at low frequencies.

Post a reply to this message

>>> IIRC I think the specs said that TTL inputs would be at a logical 1 
>>> if there was no connection. (Internal resistor to Vcc) 
>>
>> Oh.
>>
>> Well that would be a problem then. I was assuming it would be logic 0. 
>> o_O
> 
> Starting middle of September I'll be teaching digital technology in the 
> first year of the University of Applied Science in Amsterdam. If you 
> happen to be around, just drop in. I think I will do the 7400 in the 
> week of Sept 21. ;)

Heh. I doubt it - but nice idea. ;-)

> As others have said, the original TTL series by Texas Instruments acted 
> as if a one was present if left open. All other gates should do the same 
> because of backwards compatibility. That includes the CMOS pin 
> compatible replacements. I have actually seen rare default 0 gates but I 
> would consider those faulty.
> 
> When designing the rule is not to leave inputs open. Not even for gates 
> you don't use. One reason is that they could pick up interference which 
> could result in unpredictable behaviour. For CMOS gates it could also 
> result in useless power consumption. In any case the inputs are often 
> next to one another like in the 7400. It is just as easy to wire them 
> together (connecting them to ground (for NOR gates) or the positive rail 
> (for NAND gates) is often more complicated).

Mmm. This I was not aware of...

> Oh, and if you want to build your own computer, I'd suggest using also 
> other components apart from the 7400.

OOC, exactly how much space do you recon it would take to build 64KB out 
of discrete NAND gates?

-- 
http://blog.orphi.me.uk/
http://www.zazzle.com/MathematicalOrchid*

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>> The 7400 is a quad 2-input NAND gate. In other words, it's a box with 
>> four NAND gates in it.
>>
>> What's supposed to happen is that you connect pins 1 and 14 to a power 
>> source, and the remaining pins are grouped into 3s. Each group is the 
>> connections for a single NAND gate. When the inputs aren't connected, 
>> the output pin is at logic high. When you connect both of the input pins 
>> to the (+) rail, the output should go low.
> 
> Good grief Andrew, 7400s, did you rob a museum? Do you know the power
> consumption of TTL compared to CMOS? 
> Besides pin 14 being Vcc and pin 7 ground. You cannot assume that inputs will
> float high you really should drive them high or low.

I just looked up the wiring diagram.

It appears I had the right pins, they're just not numbered in the order 
I was expecting.

-- 
http://blog.orphi.me.uk/
http://www.zazzle.com/MathematicalOrchid*

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On Sun, 16 Aug 2009 01:06:12 +0200, clipka <ano### [at] anonymousorg> wrote:

>Stephen schrieb:
>>> What voltage does CMOS use anyway? IIRC, TTL can be driven with a 
>>> triplet of 1.5 V batteries.
>> 
>> Why don't you look it up as I can't remember,
>
>74HCxx: 2V to 6V (i.e. a doublet or triplet of 1.5 V batteries will do 
>fine, even when quite depleted already)
>
>74HCTxx: 5V, +/- 0.5V (i.e. a triplet will probably do quite well if 
>still good)
>
>Power consumption is virtually zero at low frequencies.

An example: Around 1975 I made a digital clock out of TTL and the power
consumption was 20 amps. About 1977 I made another using CMOS, it ran for years
on a PP3 battery.
-- 

Regards
     Stephen

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On Sun, 16 Aug 2009 09:16:51 +0100, Orchid XP v8 <voi### [at] devnull> wrote:

>OOC, exactly how much space do you recon it would take to build 64KB out 
>of discrete NAND gates?

For memory you could use a D type flip-flop which can be made using 4 NAND gates
and an inverting gate. It would be better to use a Master-slave D type flip-flop
which would double the components. So for each *bit* of memory you would need 2
X 7400s and 1/3 X 7404. or a 7474 or a 7479.

What size of word are you thinking of? IIRC the typical power consumption of TTL
is about 250 ma. You will need a robust power supply.
-- 

Regards
     Stephen

Post a reply to this message

>> OOC, exactly how much space do you recon it would take to build 64KB out 
>> of discrete NAND gates?
> 
> For memory you could use a D type flip-flop which can be made using 4 NAND gates
> and an inverting gate. It would be better to use a Master-slave D type flip-flop
> which would double the components. So for each *bit* of memory you would need 2
> X 7400s and 1/3 X 7404. or a 7474 or a 7479.
> 
> What size of word are you thinking of? IIRC the typical power consumption of TTL
> is about 250 ma. You will need a robust power supply.

Of course, I have no serious *intention* of making more than about a 
dozen bytes of RAM using only NAND gates. ;-) But I'm aware that way 
back in prehistoric times, they used to do it this way.

No wonder computers cost more that housing estates - they were *bigger* 
than housing estates! :-D

-- 
http://blog.orphi.me.uk/
http://www.zazzle.com/MathematicalOrchid*

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triple_r wrote:
> a computer that gets upset when you make programming errors!  There must be
> room for an "In Soviet Russia..." joke somewhere around here.

In Soviet Russia, the computer hacks you.

>  - Ricky

-Aero

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On Sun, 16 Aug 2009 14:09:32 +0100, Orchid XP v8 <voi### [at] devnull> wrote:

>
>Of course, I have no serious *intention* of making more than about a 
>dozen bytes of RAM using only NAND gates. ;-)

Surprise me :D

> But I'm aware that way back in prehistoric times, they used to do it this way.
>

Back in prehistoric days, at least when I started working in computing, RAM was
ferrite-core memory. Literally ferrite or ceramic toroids threaded with wires to
store information via the polarity of the magnetic fields.
http://en.wikipedia.org/wiki/Core_memory
 

>No wonder computers cost more that housing estates - they were *bigger* 
>than housing estates! :-D

It was the air conditioning that took up the room :)
-- 

Regards
     Stephen

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On 16-8-2009 15:09, Orchid XP v8 wrote:
>>> OOC, exactly how much space do you recon it would take to build 64KB 
>>> out of discrete NAND gates?
>>
>> For memory you could use a D type flip-flop which can be made using 4 
>> NAND gates
>> and an inverting gate. It would be better to use a Master-slave D type 
>> flip-flop
>> which would double the components. So for each *bit* of memory you 
>> would need 2
>> X 7400s and 1/3 X 7404. or a 7474 or a 7479.
>>
>> What size of word are you thinking of? 

let's assume 8 bit and that we need about as much logic to select the 
bits. That'll be a breadboard if about 25 by 25 meter (modulo arithmetic 
errors), so not too bad.

> IIRC the typical power 
>> consumption of TTL
>> is about 250 ma. You will need a robust power supply.

Cooling was a more difficult problem than the logical design of 
supercomputers.

> Of course, I have no serious *intention* of making more than about a 
> dozen bytes of RAM using only NAND gates. ;-) But I'm aware that way 
> back in prehistoric times, they used to do it this way.

I don't think they did it with 7400s. The description of the ENIAC 
suggests that they did something similar, though I would not be 
surprised if they used a slightly different design. By that time the 
tubes were much more versatile than simple transistors.

A popular one afrom the beginning of mainframe computers was core memory 
(see e.g. http://www.columbia.edu/acis/history/core.html).

> No wonder computers cost more that housing estates - they were *bigger* 
> than housing estates! :-D

That was only in a very short period of time. Aside the analog computers 
then were just as big.

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On Sun, 16 Aug 2009 16:55:46 +0200, andrel <a_l### [at] hotmailcom> wrote:

>A popular one afrom the beginning of mainframe computers was core memory 
>(see e.g. http://www.columbia.edu/acis/history/core.html).

Just wandering down memory lane I looked up the Honeywell H316 as it was the
first computer that I worked on. At one time marketed as "The Honeywell Kitchen
Computer" LOL http://en.wikipedia.org/wiki/Honeywell_316

http://www.bitsavers.org/pdf/honeywell/series16/h316/70130072179A_RealTimeClk_May69.pdf

I found a site with lots of documents even circuit diagrams
http://www.bitsavers.org/pdf/honeywell/series16/h316/

36 Meg pdf
http://www.bitsavers.org/pdf/honeywell/series16/h316/70130072166AV_316_ModulesAndParts_Nov74.pdf

Bookmark 2-07 gives the "Principles of Magnetic Core Operation"

-- 

Regards
     Stephen

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Orchid XP v8 schrieb:
> It appears I had the right pins, they're just not numbered in the order 
> I was expecting.

That /might/ lead to incorrectly wired circuitry :-P

Post a reply to this message

>> It appears I had the right pins, they're just not numbered in the 
>> order I was expecting.
> 
> That /might/ lead to incorrectly wired circuitry :-P

The point being, it *is* the two corner pins, as I expected. It's just 
that those corners aren't numbered 1 and 14 for some reason.

-- 
http://blog.orphi.me.uk/
http://www.zazzle.com/MathematicalOrchid*

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Since I'm currently using the onboard video adapter (Radeon 3200, they 
call it), I wasn't expecting to play many games until I bought a new 
video card.

However, I'm quite impressed by the performance of it.  Company of 
Heroes runs fine (with options turned down, of course ;) ), and HL2 ran 
well enough that I decided to get Ep 1&2 (they're on sale, and I've 
never gotten around to playing them).

Ooh... I should install Civ IV again!  That should run just fine :)

(As if I needed more ways to waste my time ;) )

...Chambers

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Orchid XP v8 schrieb:
> The point being, it *is* the two corner pins, as I expected. It's just 
> that those corners aren't numbered 1 and 14 for some reason.

You're talking about the power pins?

They are typically found at the opposite corners of the chip, "bottom 
left" being GND and "top right" being VCC. Not only for 74xx, but for a 
great number of stuff commonly found in DIL packages (memory ICs, 
microcontrollers and what-have-you-nots).

The numbering seems to have evolved independently from this, following a 
"U" shape starting at "top left". This is /always/ the case for DIL 
packages (with problems arising only if pins are completely left out; I 
think they're counted as if they were there).

Indeed this, combined, is not very intuitive.

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On 16-8-2009 19:34, Orchid XP v8 wrote:
>>> It appears I had the right pins, they're just not numbered in the 
>>> order I was expecting.
>>
>> That /might/ lead to incorrectly wired circuitry :-P
> 
> The point being, it *is* the two corner pins, as I expected. It's just 
> that those corners aren't numbered 1 and 14 for some reason.

Let me guess: valves

Post a reply to this message

On 16-8-2009 17:27, Stephen wrote:
> On Sun, 16 Aug 2009 16:55:46 +0200, andrel <a_l### [at] hotmailcom> wrote:
> 
>> A popular one afrom the beginning of mainframe computers was core memory 
>> (see e.g. http://www.columbia.edu/acis/history/core.html).
> 
> Just wandering down memory lane I looked up the Honeywell H316 as it was the
> first computer that I worked on. At one time marketed as "The Honeywell Kitchen
> Computer" LOL http://en.wikipedia.org/wiki/Honeywell_316

Seems you are a few years before into computers. I started programming 
on (I think) a TRS80 in 1978 or 1979. Although I might have encountered 
a computer before that at my summer holiday job, which had something to 
do with punched cards. My first serious mainframe was a CDC Cyber 
stationed at SARA, the computer facility in Amsterdam in 1982.
I just found some stuff from that era. Yip does bring back memories.

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On Sun, 16 Aug 2009 21:55:11 +0200, andrel <a_l### [at] hotmailcom> wrote:

>Seems you are a few years before into computers.

My first real job was with Honeywell, in 1969. Where I tested PCBs for the H-416
and H-316. The first computer I ever saw was a valve analog one at Glasgow
University a couple of years earlier. I spent about 10 years working in computer
maintenance in factories before working offshore. Which was a very different
life :)
Now I skive around working in SAP configuring the Plant Maintenance and Customer
Service modules.
-- 

Regards
     Stephen

Post a reply to this message

On 16-8-2009 22:24, Stephen wrote:
> On Sun, 16 Aug 2009 21:55:11 +0200, andrel <a_l### [at] hotmailcom> wrote:
> 
>> Seems you are a few years before into computers.
> 
> My first real job was with Honeywell, in 1969. Where I tested PCBs for the H-416
> and H-316. The first computer I ever saw was a valve analog one at Glasgow
> University a couple of years earlier. I spent about 10 years working in computer
> maintenance in factories before working offshore. Which was a very different
> life :)

Hey, another off-shore guy. Coincidence? I guess so.

> Now I skive around working in SAP configuring the Plant Maintenance and Customer
> Service modules.

Off to Google... Ok, SAP is that sort of company. Having plant and sap 
in one sentence might suggest something else. Just kidding, I simply had 
not heard of it. And I assume skive means something with a lot of 
travelling.

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On Sun, 16 Aug 2009 22:34:00 +0200, andrel <a_l### [at] hotmailcom> wrote:


>Hey, another off-shore guy. Coincidence? I guess so.
>

You too?

Shay works offshore in the Mexican Gulf IIRC

>> Now I skive around working in SAP configuring the Plant Maintenance and Customer
>> Service modules.
>
>Off to Google... Ok, SAP is that sort of company. Having plant and sap 
>in one sentence might suggest something else. Just kidding, 

LOL

>I simply had 
>not heard of it. And I assume skive means something with a lot of 
>travelling.

http://en.wikipedia.org/wiki/Skive

-- 

Regards
     Stephen

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On 16-8-2009 22:45, Stephen wrote:
> On Sun, 16 Aug 2009 22:34:00 +0200, andrel <a_l### [at] hotmailcom> wrote:
> 
> 
>> Hey, another off-shore guy. Coincidence? I guess so.
>>
> 
> You too?

No, referring to the Shay of the line below.

> Shay works offshore in the Mexican Gulf IIRC

I think he is grounded again.

> 
>>> Now I skive around working in SAP configuring the Plant Maintenance and Customer
>>> Service modules.
>> And I assume skive means something with a lot of 
>> travelling.
> 
> http://en.wikipedia.org/wiki/Skive

Ok, I have to work on my Brittish slang.

Post a reply to this message

On Sun, 16 Aug 2009 22:56:56 +0200, andrel <a_l### [at] hotmailcom> wrote:

>No, referring to the Shay of the line below.
>
>> Shay works offshore in the Mexican Gulf IIRC
>
>I think he is grounded again.
>

???

>> 
>>>> Now I skive around working in SAP configuring the Plant Maintenance and Customer
>>>> Service modules.
>>> And I assume skive means something with a lot of 
>>> travelling.
>> 
>> http://en.wikipedia.org/wiki/Skive
>
>Ok, I have to work on my Brittish slang.

I'll help where I can :P
-- 

Regards
     Stephen

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On 16-8-2009 23:02, Stephen wrote:
> On Sun, 16 Aug 2009 22:56:56 +0200, andrel <a_l### [at] hotmailcom> wrote:
> 
>> No, referring to the Shay of the line below.
>>
>>> Shay works offshore in the Mexican Gulf IIRC
>> I think he is grounded again.
>>
> 
> ???

To show of my lack of knowledge I decided to use an expression that 
probably would not mean 'he has a job on land now' not even for offshore 
people. I think I succeeded.

>>>>> Now I skive around working in SAP configuring the Plant Maintenance and Customer
>>>>> Service modules.
>>>> And I assume skive means something with a lot of 
>>>> travelling.
>>> http://en.wikipedia.org/wiki/Skive
>> Ok, I have to work on my Brittish slang.
> 
> I'll help where I can :P

Post a reply to this message

On Mon, 17 Aug 2009 00:34:57 +0200, andrel <a_l### [at] hotmailcom> wrote:

>>>> Shay works offshore in the Mexican Gulf IIRC
>>> I think he is grounded again.
>>>
>> 
>> ???
>
>To show of my lack of knowledge I decided to use an expression that 
>probably would not mean 'he has a job on land now' not even for offshore 
>people. I think I succeeded.

"Grounded" specifically means not allowed to by an authority, amongst other
things. A pilot or plane can be grounded by weather or for safety reasons. A
child may be grounded by its parents as a punishment.   
If Shay were working onshore, in Britain, we would say that he is "on the
beach". But I'm sure he will let us know when he next pops in.
-- 

Regards
     Stephen

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