[Warp <war### [at] tagpovrayorg>]
|   Never heard of it.

Surprising. 

|   And if there are new instructions in P-III, the optimized version mentioned
| earlier certainly doesn't use them because it works fine in a P-II.

There are about 70 new instructions to the P-III compared to P-II, 
including a new processor state which allows MMX operations to be performed
at the same time as normal floating points operations, which isn't possible
on the P-II.

I say "Normal floating points" operations because the P3 have a new
type in the so called KNI (Katmai New Instructions also known as MMX2), which
is a type of SIMD instructions. (Single Instruction Multiple Data) 

The 70 new instructions are connected to eight new 128-bit 4*32-bit wite
single precision CPU registers that are tailor made for 3d vector operations.
I doubt they are used by the P3-optimized compile since 32-bit isn't wide
enough for POV-Ray, but a similar instruction set on the P4 have 64-bit
registers and could give POV-Ray quite a boost, if the compiler is willing.
For maximum speed one would have to rewrite the source code to take full
advantage of this.

I don't know you assume that asking a compiler to optimize a program for 
a certain CPU will break all backwards support. It is quite possible to 
include two bits of code for critical areas where new instructions are used 
and have the runtime environment chose the correct one just prior to runtime.

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