Dan Connelly wrote:
 
> The problem reminds me of the one in semiconductor device processing,
> where Monte-Carlo is being used to predict the distribution of ions
> which result from the bombardment of semiconductor device surfaces
> with charged dopants.  Some excellent results were demonstrated
> at the latest International Electron Device Conference in San Francisco
> of the use of some clever but relatively simple techniques to get
> more out of each randomly sampled ion event.  For example, one can
> do "particle splitting" in which more than one particle shares part of a path,
> but then part way through is split into multiple particles to generate
> different random paths.  But I digress....

I regress ...

What is the benefit of the above process. It sounds like
they are trying to increase electron flow while reducing
resistance at the junction. Mosfet applications ?

-- 
Ken Tyler

tyl### [at] pacbellnet

Post a reply to this message

Ken wrote:
> 
> Dan Connelly wrote:
> 
> > The problem reminds me of the one in semiconductor device processing,
> > where Monte-Carlo is being used to predict the distribution of ions
> > which result from the bombardment of semiconductor device surfaces
> > with charged dopants.  Some excellent results were demonstrated
> > at the latest International Electron Device Conference in San Francisco
> > of the use of some clever but relatively simple techniques to get
> > more out of each randomly sampled ion event.  For example, one can
> > do "particle splitting" in which more than one particle shares part of a path,
> > but then part way through is split into multiple particles to generate
> > different random paths.  But I digress....
> 
> I regress ...
> 
> What is the benefit of the above process. It sounds like
> they are trying to increase electron flow while reducing
> resistance at the junction. Mosfet applications ?


Which process?  The physical process?  If so, yes -- the primary application
is the formation of MOSFETs.  For example, As+ implanted into B-doped Si
results in "islands" of electron-rich (electrons coming from the As, which has
valence of 5, and thus has an extra electron to give to the lattice) Si connected
with electron-deficient regions (the B has valence of 3, and thus traps electrons).
An electrode above an insulating plate connecting the electron-rich regions
is used to control a sheet of electrons at the surface which, if formed,
closes the switch.  If not, the electron-rich islands are isolated, and
the switch is "open".
 
The simulation process is used to predict the extent of the electron-rich
islands -- the goal is to keep them as dense and compact as possible... this
allows them to be placed in close proximity (separated by approximately 
0.1 micrometers in cutting-edge technology), increasing the speed at which
the connection can be switched.

Dan

P.S. There are also devices with electron-deficient islands formed in an
electron-rich region.... in this case the conduction is via "holes" rather
than "electrons".  Both devices are used in conjunction to form "CMOS".

-- 
http://www.flash.net/~djconnel/

Post a reply to this message

Dan Connelly wrote:

> P.S. There are also devices with electron-deficient islands formed in an
> electron-rich region.... in this case the conduction is via "holes" rather
> than "electrons".  Both devices are used in conjunction to form "CMOS".

Are these what they call depletion mode devices ?

P.S. Sorry for the off topic discussion folks and I promise to let it
go after this. It's just that I love this stuff.

-- 
Ken Tyler

tyl### [at] pacbellnet

Post a reply to this message

Ken wrote:
> 
> Dan Connelly wrote:
> 
> > P.S. There are also devices with electron-deficient islands formed in an
> > electron-rich region.... in this case the conduction is via "holes" rather
> > than "electrons".  Both devices are used in conjunction to form "CMOS".
> 
> Are these what they call depletion mode devices ?
> 
> P.S. Sorry for the off topic discussion folks and I promise to let it
> go after this. It's just that I love this stuff.
> 

Not necessarily -- they are PMOS ( as opposed to NMOS ).

Basically when one speaks of "electrons" in semiconductors one is
actually speaking of eigenstates of the macroscopic state of the
electron gas.... due to diffraction effects from the lattice,
quanta of electron charge manifest themselves as "quasiparticles" which
can have different energies at a given momentum.  Some of these states
are effectively all occupied, others effectively so high in energy they
are never occupied.  Two sets of states straddle the "Fermi level", which
is sort of a threshold energy required to achieve net charge neutrality
between electrons and protons.  Those states above the Fermi level by a
few fractions of an electron volt are electron-like -- they tend to be light
and fast.  Those just below the Fermi level are mostly occupied.... the states
which are NOT occupied act as positively charged quasiparticles called "holes".
It is the holes which act as the current carriers in PMOS devices.
They tend to be "heavier" and thus PMOS devices are slower than NMOS.

Basically, NMOS devices are used as pull-down switches (shorting things to ground)
while PMOS are pull-up devices (shorting things to the supply voltage).  Since
switches are faster when they support a larger voltage drop, this guarantees at
least one of the two switches supporting a circuit node will have a large voltage drop
across it at any given time, allowing transitions to be executed quickly.

Anyway, enough of that....  time to go to work :).

Dan

-- 
http://www.flash.net/~djconnel/

Post a reply to this message