POV-Ray : Newsgroups : povray.off-topic : BPM : Re: Microcode Server Time
4 Sep 2024 07:16:45 EDT (-0400)
  Re: Microcode  
From: Mike Raiford
Date: 11 Jun 2010 08:47:40
Message: <4c12306c$1@news.povray.org>
On 6/11/2010 3:00 AM, Invisible wrote:

>
> As you say, we're just arguing about semantics now. I always thought of
> microcode as being a block of ROM (or even some kind of EPROM) which
> actual address decode circuitry, so that you can execute jumps and so
> forth. By contrast, the CPU I'm designing has no such thing. It's just
> that on each clock pulse, a different control line becomes active, and
> that line connects to one or more control lines (possibly via logic
> gates that pass the signal only if the opcode has certain bits set). I
> wouldn't call that microcode; it'd call that "a custom arrangement of
> gates".

I might be wrong, but my definition of microcode is thus:

A sequence of one or more control signal sets configured to execute the 
desired instruction. On mine, for example, the microcode rom is 
basically a big LUT allowing for 16 microcode steps each instruction, 
since an instruction can have more than one phase:

For example

ld a, [si]

decodes to a series of instructions:

output the contents of si to the address latches
fetch the memory word from that location and store it in the register a
fetch next instruction

(The second can be done is a single step, due to the mux/dmux pair that 
allows most registers or busses to be connected to other registers or 
busses)





-- 
~Mike


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