>> The 7400 is a quad 2-input NAND gate. In other words, it's a box with 
>> four NAND gates in it.
>>
>> What's supposed to happen is that you connect pins 1 and 14 to a power 
>> source, and the remaining pins are grouped into 3s. Each group is the 
>> connections for a single NAND gate. When the inputs aren't connected, 
>> the output pin is at logic high. When you connect both of the input pins 
>> to the (+) rail, the output should go low.
> 
> Good grief Andrew, 7400s, did you rob a museum? Do you know the power
> consumption of TTL compared to CMOS? 
> Besides pin 14 being Vcc and pin 7 ground. You cannot assume that inputs will
> float high you really should drive them high or low.

I just looked up the wiring diagram.

It appears I had the right pins, they're just not numbered in the order 
I was expecting.

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