On 16-8-2009 15:09, Orchid XP v8 wrote:
>>> OOC, exactly how much space do you recon it would take to build 64KB 
>>> out of discrete NAND gates?
>>
>> For memory you could use a D type flip-flop which can be made using 4 
>> NAND gates
>> and an inverting gate. It would be better to use a Master-slave D type 
>> flip-flop
>> which would double the components. So for each *bit* of memory you 
>> would need 2
>> X 7400s and 1/3 X 7404. or a 7474 or a 7479.
>>
>> What size of word are you thinking of? 

let's assume 8 bit and that we need about as much logic to select the 
bits. That'll be a breadboard if about 25 by 25 meter (modulo arithmetic 
errors), so not too bad.

> IIRC the typical power 
>> consumption of TTL
>> is about 250 ma. You will need a robust power supply.

Cooling was a more difficult problem than the logical design of 
supercomputers.

> Of course, I have no serious *intention* of making more than about a 
> dozen bytes of RAM using only NAND gates. ;-) But I'm aware that way 
> back in prehistoric times, they used to do it this way.

I don't think they did it with 7400s. The description of the ENIAC 
suggests that they did something similar, though I would not be 
surprised if they used a slightly different design. By that time the 
tubes were much more versatile than simple transistors.

A popular one afrom the beginning of mainframe computers was core memory 
(see e.g. http://www.columbia.edu/acis/history/core.html).

> No wonder computers cost more that housing estates - they were *bigger* 
> than housing estates! :-D

That was only in a very short period of time. Aside the analog computers 
then were just as big.

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