POV-Ray : Newsgroups : povray.off-topic : Idle curiosity : Re: Idle curiosity Server Time
7 Sep 2024 03:20:25 EDT (-0400)
  Re: Idle curiosity  
From: scott
Date: 18 Aug 2008 05:38:14
Message: <48a94306$1@news.povray.org>
> See, in theory the way a transistor works is supposed to be simple. 
> However, every transistor circuit I've ever looked at seems so damned 
> complicated...

You mean something like this - a simple amplifier circuit?

http://www.cjseymour.plus.com/layin/BJTAMP.jpg

The reason it looks complicated is because you are using a 
current-amplifying device (the BJT) to amplify voltage.

The two resistors on the left are to bias the input voltage to somewhere in 
the middle of the operating range of the transistor.  Otherwise you cannot 
amplify negative input voltages (quite common in audio signals...).

The capacitor on the left allows the input voltage to be added to the bias 
voltage.

Resistor R3 causes the amount of current flowing out of the emitter to be 
(almost) proportional to the input (base) voltage.  Capacitor C2 helps to 
boost the gain by allowing AC signals to see a lower resistance to ground, 
but still keeping the DC operating point.

Resistor R4 generates the output voltage proportional to the amplified 
current flowing through the collector/emitter.  Capacitor C3 removes any DC 
component of the signal.

Note that the circuit inverts as well as amplifying...

> ...and this is why I like to stick to logic circuits. You don't have to 
> worry about obscure concepts like impedance or capacitance. (I mean, 
> unless you're designing "high performance" circuits anyway.)

Even with logic circuits, you cannot connect a single output to 5000 inputs, 
there is always a limit due to internal resistances.  At some point your 
circuit is going to fail, and for some technologies the number is much lower 
than 5000.

> Even so, you can make a NAND gate out of just 2 electromechanical relays.

How?

> Why does it require twice that number when you use transistors? 
> (Additionally, I can't make any sense out of that diagram. The wiring 
> seems to have no reason or rhyme to it.)

Out is either connected to Vss (low) or Vdd (high) depending on the inputs A 
and B.  If A or B or both are low, then Out gets connected to Vdd because 
one (or both) of the top FETs will start conducting.  Only if both A and B 
are high will there be a link between Out and Vss.


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