On 13-Jul-08 11:33, Orchid XP v8 wrote:
> andrel wrote:
> 
>> Neither the 6510 nor the Z80 had a floating point processor. Floating 
>> point was in software.
> 
> That's true. But assuming we want, say, a normal "double precision" 
> floating point number, how many clock cycles would you estimate it takes 
> to operation on? A dozen? A hundred?

My estimate would be that adding 2 floating points would be around 50 
and multiplication more 100-150, but I could be an order of magnitude wrong.

> 
>> Both had a variable instruction set that took a variable amount of 
>> cycles to execute and therefor the number of instruction processed 
>> depended on the program and especially on the addressing modes used.
> 
> I thought this was true for *all* processors?

not for RISC and only partial for state of the art processors.

> 
> (Of course, unlike modern processors, cache effects are not present.)
> 
>> although the MIPS rate is not very well defined, on average it may be 
>> in the order of 1/3rd of the clock speed for 65xx and 1/5th-1/4th for 
>> Z80.
> 
> Sounds roughly right. (For the 65xx anyway - I have a manual somewhere 
> that lists all the opcodes and addressing modes...)
> 
> So that gives us, very approximately,
> 
> - C64 = 1.0 MHz / 3 = 0.333 MIPS.
> - ZX Spectrum = 3.5 MHz / 4 = 0.875 MIPS.

please don't use 3 significant digits.

> 
> So each is giving us probably a few hundred thousand complete opcodes 
> executed every second.
> 
> Now, anybody have any clue "how big" the numbers are for less ancient CPUs?
> 

http://en.wikipedia.org/wiki/Million_instructions_per_second

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