POV-Ray : Newsgroups : povray.programming : CUDA - NVIDIA's massively parallel programming architecture : Re: CUDA - NVIDIA's massively parallel programming architecture Server Time
1 Jun 2024 19:14:25 EDT (-0400)
  Re: CUDA - NVIDIA's massively parallel programming architecture  
From: Chambers
Date: 20 May 2007 13:24:05
Message: <46508435@news.povray.org>
Warp wrote:
>   Compilers don't need to simulate anything: Intel FPUs have supported 64-bit
> floating point numbers since probably the 8087. That has nothing to do with
> the register size of the CPU, as the FPU is quite independent of it.

I think it was actually the 287, but I could very easily be wrong about 
that :)

-- 
...Ben Chambers
www.pacificwebguy.com


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