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In article <405f5d42@news.povray.org> , Warp <war### [at] tag povray org> wrote:
>> I am not sure what this is supposed to say at all. Nothing says that "
>> double " cannot be a 128 bit IEEE 754 float. In fact, certain platforms do
>> currently offer 128 bit IEEE 754 floats as "long double".
>
> UltraSparc is an example of this.
Not only there. The first Sparc FPU defined this already. Even funnier,
also unrelated, Sparc FPUs use two 64 bit float registers to store one 128
bit float. Not very RISC-like. Well, actually Sparc FPUs are not really
part of the CPU in the instruction set design. Sparc rather closely follows
the 68K "extension" processor model.
Thorsten
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Thorsten Froehlich, Duisburg, Germany
e-mail: tho### [at] trf de
Visit POV-Ray on the web: http://mac.povray.org
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