In article <3c1f55ec@news.povray.org> , Warp <war### [at] tagpovrayorg>  wrote:

>   On the other hand, when there's a cache miss, significant amount of time is
> spent copying a portion of the RAM to the cache. If the RAM is faster,
> wouldn't this copying be faster as well?

Yes and no.  It all depends very much on the cache and processor design.
Usually cache misses will be hidden due to pre-fetching.  In particular x86
processors have extraordinarily long pipelines with ten or more stages even
for simple instructions.  So those can hide a lot of latency in memory if
the processor reads early and there are numerous other methods to cover for
slow memory.

In addition statistics show that most thinks at a particular time are done
locally on a small scale.  I.e. a MPEG/JPEG discrete cosine transform will
take blocks of 8*8, so you have 64 fairly local accesses again.  So even in
extreme data processing applications like these there is some locality  The
same is true for POV-Ray on the small scale, i.e. when walking a linked
structure.

While this may seem like a contradiction, a good cache architecture like the
ones used in processors today will hide almost all of these different yet
similar access types and main memory access plays only a very minor role as
long as the time it takes to process one piece of information from memory
still takes longer than it takes to get it from memory.

Well, the whole situation is very complex with the cache and processor
designs today because of out-of-order and delayed bus transfers or even
packet based bus systems and hard to explain without writing a book about
it, so I will stop here...

    Thorsten

____________________________________________________
Thorsten Froehlich, Duisburg, Germany
e-mail: tho### [at] trfde

Visit POV-Ray on the web: http://mac.povray.org

Post a reply to this message