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In article <36A9951C.206A4394@pilot.msu.edu> , portelli <por### [at] pilotmsuedu>
wrote:
>> There is no difference for processor between floating point and integer
instructions,
>> the thread with *all* its instructions will be exectuted on the same processor.
For
>> todays processors (with built-in floating point units) there is *no* difference
>> between floating point and integer or any other instructions.
>
>I don't get what you mean. There are separate machine instructions and
>registers for floating point. How is ther no difference. Of course
>I've never programed for an Intel.
I am talking about physical differences, you are talking about logical differences.
The processor does not care much about if these are in separate registers or function
units. The question suggested that FPU instructions would not automatically be
executed on both processors, which is impossible (today and on most mainstream CISC
and RISC processors): The processor (example Intel 486DX) will do the following
steps:
1. Fetch Get the instruction from memory.
2. Decode 1 & 2 Find out what the instruction wants to do.
3. Execution Get data from register(s) and/or memory and do what the instruction
said.
4. Write Back Write the data back into register and/or memory.
Explanation:
I use the 486DX as example because of its simple structure. More modern processors
use more advance techniques (register renaming, out-of-order execution etc) which are
hard to put into a short paragraph. However, the _basic_ function of the processor
since the 486 has not changed much in the way it works, and also note that (nearly)
all of todays processors share a nearly similar internal structure. They have more
than one integer unit or floating point unit and all these work in parallel *inside*,
transparent to the programmer (execution times will be different, of course).
The fact that the processor has separate registers for floating point and integer
instructions is (today) only relevant for the programmer, inside the processor all
instructions are decoded in the same way, access the memory in the same way etc. The
only difference is that they are executed in different circuits (of course).
(Note, just in case someone is wondering: Actually, the 486 already has a 5 stage
pipeline, there are two stages for decoding, but I order to keep it simple I made
them one stage).
Thorsten
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